000 00646nam a2200241Ia 4500
008 240107s9999 xx 000 0 und d
020 _a88181283160
082 _a621.382 2 BAY
082 _bBAY
100 _aBAYOUMI MAGDY A
245 0 _aVLSI DESIGN MATHODOLOGIES FOR DIGITAL SIGNAL PROCESSING ARCHITECTURES
245 0 _aVLSI DESIGN MATHODOLOGIES FOR DIGITAL SIGNAL PROCESSING ARCHITECTURES
250 _n1st
260 _aDELHI
260 _bSPRINGER
260 _c2009
300 _a399
365 _b695
500 _aUNDER TEQIP PHASE -II
650 _aELECTRONICS
650 _bARCHITECTURE VLSI DIGITAL
942 _cREF
999 _c15009
_d15009