UYEMURA JOHN P <br/><br/>
CHIP DESIGN FOR SUBMICRON VLSI CHIP DESIGN FOR SUBMICRON VLSI 

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 - NEW DELHI  THOMSON  2013 
 - 412 
<br/><br/> UNDER TEQIP PHASE -II 
<br/><br/><label>ISBN: </label>9.78813E+12 
<br/><br/><label>Subjects--Topical Terms: </label><br/>ELECTRONICS VLSI 
<br/><br/><label>Dewey Class. No.: </label>621.381 73 UYE  / UYE