TY  - BOOK
AU  - GROUT LAN
TI  - DIGITAL SYSTEMS DESIGN WITH FPGAs AND CPLDs
SN  - 81-312-1856-3
U1  - 621.381 GRO 
CY  - NEW DELHI
KW  - ELECTRONICS
KW  - DIGITAL SYSTEMS DESIGN FPGA CPLD
N1  - UNDER TEQIP PHASE -II
ER  -