GROUT LAN <br/><br/>
DIGITAL SYSTEMS DESIGN WITH FPGAs AND CPLDs DIGITAL SYSTEMS DESIGN WITH FPGAs AND CPLDs 

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 - NEW DELHI  ELSEVIER  2012 
 - 724 
<br/><br/> UNDER TEQIP PHASE -II 
<br/><br/><label>ISBN: </label>81-312-1856-3 
<br/><br/><label>Subjects--Topical Terms: </label><br/>ELECTRONICS DIGITAL SYSTEMS DESIGN FPGA CPLD 
<br/><br/><label>Dewey Class. No.: </label>621.381 GRO  / GRO