UYEMURA JOHN P <br/><br/>
CHIP DESIGN FOR SUBMICRON VLSI CHIP DESIGN FOR SUBMICRON VLSI 

 - 
 - NEW DELHI  THOMSON  2012 
 - 411 
<br/><br/> UNDER TEQIP PHASE -II 
<br/><br/><label>ISBN: </label>81-315-0195-5 
<br/><br/><label>Subjects--Topical Terms: </label><br/>ELECTRONICS VLSI 
<br/><br/><label>Dewey Class. No.: </label>621.381 73 UYE  / UYE